This invention relates to the field of dense electronic packaging, and particularly to packaging which obtains significant reductions in the distances traveled by the electronic signals.
Several patents and applications of the assignee of this application relate to the use of stacked IC (integrated circuit) chips which form memory modules usable in computer systems, e.g., U.S. Pat. Nos. 4,525,921; 4,646,128; 4,706,166 and 5,104,820; and applications Ser. Nos. 07/884,660 and 07/884,719.
This application deals with the systems in which such memory chip stacks are used. Memory devices, whether they are individual chips, or stacks of chips, must be mounted on a substrate which provides electrical leads connected to the memory circuitry. Also, the substrate must provide electrical leads extending to one or more computer (microprocessor) chips, whose memory needs are served by the memory chips. In other words, the microprocessor chips do not have the internal capacity to include substantial memory functions.
Packages which are advertised as state of the art microprocessor systems are illustrated in FIGS. 1 and 2 of this application. In each case a plurality of memory chips are located on the same PC board with one or more microprocessor chips.
The present invention, as well as the systems illustrated in FIGS. 1 and 2, have been in part motivated by the need for a massively parallel, highly interconnected data processing system. Such a system requires a large number of microprocessors connected in parallel, and served by extensive memory systems. In FIG. 4 of this application, a structure is shown having many microprocessors connected in parallel, together with their supporting memory systems. The entire structure is contained in an area less than 1/16 of any such combination heretofore developed.
In attempting to solve the problem just discussed, a first path investigated was along the lines of the systems shown in FIGS. 1 and 2. On a ceramic substrate, a multiplicity of microprocessor chips and a multiplicity of memory devices were assembled in the most compact arrangements which could be designed.
A second path investigated was to use chip-stacking techniques of the type referred to above, which were originated by the assignee of this application. In such an approach, microprocessor chips and other chips, including memory chips, would be included in a single module as stacked layers of different sizes.